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 Agilent ADNS-2001 Optical Mouse Sensor
Data Sheet
* High speed motion detector - Accurately measures up to 16 inches per second at 400 cpi * Accurate navigation over a wide range of surfaces - Enables mouse to be used with or without a mouse pad * Power conservation mode during no motion * Compatible with high volume manufacturing processes - Requires no precision optical alignment - Wave solderable * 33% faster than HDNS-2000 - 2000 fps (@ 24 MHz) Applications * Computer mice for desktop PCs, workstations, and portable computers * Trackball * Integrated input devices
Description The ADNS-2001 is a low-cost reflective optical sensor that provides a non-mechanical tracking engine for implementing a computer mouse. It is based on optical navigation technology which measures changes in position by optically acquiring sequential surface images (frames) and mathematically determining the direction and magnitude of movement. The sensor is mounted in a plastic optical package and designed to be used with the HDNS-2100 (Lens), HDNS-2200 (LED Assembly Clip) and HLMP-ED80 (High Light Output 639 nm LED), providing a complete and compact tracking engine. This optical tracking engine has no moving parts and requires no precision optical alignment enabling high volume system assembly. The ADNS-2001 offers a PS/2 or quadrature output mode for interface flexibility. Resolution is specified as 400 cpi at rates of motion up to 16 inches per second.
Features * Optical navigation technology - Superior precision and smooth navigation optimized for desktop and portable mouse applications - No mechanical moving parts, provides high reliability and needs no maintenance * Complete compact 2-D motion sensor - Easy implementation and design flexibility - Replaces mechanical ball system in traditional mice * Two selectable output modes - Two channel quadrature output mode (X and Y direction) which emulates encoder phototransistors - Standard 3-button PS/2 output mode
Caution: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Theory of Operation The ADNS-2001 is based on Optical Navigation Technology. It contains an Image Acquisition System (IAS), Digital Signal Processor (DSP), and a mode selectable PS/2 or quadrature output converter. The IAS acquires images of microscopic surface images via the lens and illumination
system provided by the HDNS2100, HDNS-2200, and the HLMP-ED80. These images are further processed by the DSP to determine direction and distance of motion. The DSP generates a stream of delta x and delta y relative displacement values which are then communicated to the output converter. This converter
provides a PS/2 3-button output, replacing existing mouse microcontrollers, or two channel quadrature output, for direct interface to existing mouse microcontrollers. While the part can be run at 24 MHz in quadrature mode, 18 MHz is recommended for PS/2 mode.
IMAGE ACQUISITION SYSTEM
DIGITAL SIGNAL PROCESSOR
PS/2 or QUAD OUTPUT CONVERTER
Figure 1. ADNS-2001 block diagram.
XYYWWZ
A 2001
PIN 1 22.30 (0.878)
0.99 (0.039) 3.18 (0.125)
9.10 (0.358) 5.15 (0.203)
LEAD WIDTH 0.50 (0.020) LEAD OFFSET 1.27 (0.050) LEAD PITCH 2.54 (0.100) 6.02 (0.237) 13.38 (0.527)
1.42 (0.056) KAPTON TAPE
0.25 (0.010) 5 TYP. 6.17 (0.243) 12.34 (0.486)
4.55 (0.179)
5.60 (0.220)
NOTES: 1. DIMENSIONS IN MILLIMETERS (INCHES). 2. DIMENSIONAL TOLERANCE: 0.1 mm. 3. COPLANARITY OF LEADS: 0.1 mm. 4. LEAD PITCH TOLERANCE: 0.15 mm. 5. CUMULATIVE PITCH TOLERANCE: 0.15 mm. 6. ANGULAR TOLERANCE: 3.0 DEGREES. 7. MAXIMUM FLASH + 0.2 mm. 8. CHAMFER (25 DEGREES x 2) ON THE TAPER SIDE OF THE LEAD.
Figure 2. ADNS-2001 sensor package outline drawing.
2
Pinout Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name PS2_C MODE/XA RB/XB MB/YB LB/YA XY_LED VDD3 REFB OSC1 GND OSC2 GND VDD5 VDD5 NRESET PS2_D PS/2 Mode PS/2 Interface Clock Select PS/2 Mode Right Button Input Middle Button Input Left Button Input LED Control Output 3.3 VDC Input Internal Reference Oscillator Input Ground Oscillator Output Ground 5 VDC Input 5 VDC Input NRESET PS/2 Interface Data Quadrature Mode PS/2 Interface Clock XA Output XB Output YB Output YA Output LED Control Output 3.3 VDC Input Internal Reference Oscillator Input Ground Oscillator Output Ground 5 VDC Input 5 VDC Input NRESET PS/2 Interface Data
2D Assembly Drawing of ADNS-2001 Shown with HDNS-2100, HDNS2200, and HLMP-ED80. Agilent provides an IGES file drawing describing the base plate molding features for lens and PCB alignment. Please contact sales representative or visit our web site. Also, see HDNS-2100 Technical Data Sheet for more information.
44.29 (1.744)
+x
19.10 (0.752)
+y BASE PLATE ESD LENS RING
PLASTIC SPRING
CLIP
14.58 (0.574) SURFACE IS 0 REF. SENSOR PCB
13.82 (0.544)
10.58 (0.417)
7.45 (0.293)
BASE PLATE ALIGNMENT POST
Figure 3.
3
Exploded View Drawing
HDNS-2200 (CLIP)
HLMP-ED80 (LED) ADNS-2001 (SENSOR)
CUSTOMER SUPPLIED PCB
HDNS-2100 (LENS)
CUSTOMER SUPPLIED BASE PLATE WITH RECOMMENDED ALIGNMENT FEATURES PER IGES DRAWING
Figure 4.
Typical Application using PS/2 Output 18 MHz Operation for generic PS/2 compatibility
3.3 V REGULATOR LP2950ACZ-3.3 1.0 F R1 0.1 F 7 VDD3 8 REFB 0.1 F
13 14 PS/2 CONNECTOR 5 3 1 2 6 4 +5 V (4) CLK (5) DATA (1) GND (3) 2 1 16 3
VDD5 VDD5 MODE/XA PS2_C PS2_D RB
HLMP-ED80 XY_LED OSC1 6 9 18.432 MHz OSC2 NRESET GND 12 11 15 18.432 MHz CERAMIC RESONATOR SUCH AS AVX KBR-18-432-MSA or MURATA CSA18.432MXZ040 0.22 F SURFACE 2N3904
BUTTONS
R
M
L
4 MB 5 LB GND 10
ADNS 2001
INTERNAL IMAGE SENSOR HDNS-2100 LENS
Note: 0.1 F between pins 7 and 8 must be ceraminc, and must be trace lengths less than 5 mm.
4
Typical USB Application using Quadrature Output 18 or 24 MHz Operation
2.7
2N3906
3.3 V REGULATOR LP2950ACZ-3.3 1.0 F R1
1.5 M
0.1 F
4.7 F
0.1 F
7.5 K 0.33 F 9 12 CEXT VDD 5 P1.0 P0.1 2 VDD D- D+ GND SHLD 6 MHz 11 XTALOUT
P0.4 P0.5 P1.2 VSS VPP P0.7 P0.6
13 14 2
VDD5 VDD5 MODE/XA
7 VDD3 8 REFB
0.1 F
HLMP-ED80 XY_LED 6 9 24.00 MHz OSC2 11 24.00 MHz CERAMIC RESONATOR SUCH AS: AVX KBR-24.00MSA or MURATA CSA24.00MXZ040 SURFACE 2N3904
13 D- 14 D+ 10 XTALIN
CYPRESS CY7C63000A-PC
P0.0 1 3 P0.2 4 P0.3 16 P1.1 P0.2 15
3 XB 4 YB 5 YA 15 NRESET
ADNS 2001
OSC1
GND GND PS2_C PS2_D
10
12
1
16
20
19
6
7
8
18
17 PANASONIC EVQ SERIES ENCODER
BUTTONS L
R
M
INTERNAL IMAGE SENSOR
HDNS-2100 LENS
Notes: 1. Due to the Cypress implementation of USB suspend mode support, the NRESET pin of the ADNS-2001 must be reset using a line from the Cypress chip. The reason for this is that the Cypress chip does not configure the port input pins until after it has received a bus reset from the USB port. The unconfigured input port pins present a 16 K pullup to VCC. If a cap is used on NRESET (pin 15), this pullup will result in the ADNS-2001 seeing a high on the MODE pin and powering up in the PS/2 mode. 2. The quadrature input pins of the Cypress part must be programmed to be Hi-Z, instead of the normal current pulldowns. This ensures that the ADNS-2001 will be able to pull the quadrature lines high over all conditions of voltage and temperature. 3. 0.1 F between pins 7 and 8 must be ceramic, and must be trace lengths less than 5 mm.
5
Recommended LED Bin Table LED Bin Category K L M N P Q R S T R1 Value 69.8 69.8 69.8 69.8 69.8 - 78.7 69.8 - 93.1 69.8 - 113 69.8 - 137 69.8 - 169
The 69.8 resistor is determined by the absolute maximum rating of 50 mA for the HLMP-ED80. The other resistor values for brighter bins will guarantee good signals with reduced power. For the IEC 60825-1 eye safety consideration, please contact sales representative for the technical report.
Absolute Maximum Ratings Parameter Storage Temperature Operating Temperature Lead Solder Temperature Symbol TS TA Min. -40 0 Max. 85 40 260 Units C C C Notes
For 10 seconds, 1.6 mm below seating plane (see HLMP-ED80 data sheet for LED solder specifications)
Supply Voltage Supply Voltage ESD Input Voltage Input Voltage
VDD3 VDD5 Vin Vin
-0.5 -0.5 -0.5 -0.5
3.6 5.5 2 VDD5 + 0.5 VDD3 + 0.5
V V kV V V
All pins, Human Body Model All I/O except OSC1 and OSC2 OSC1 and OSC2
6
Recommended Operating Conditions Parameter Operating Temperature Supply Voltage Supply Voltage Clock Frequency Resonator Impedance Reset Capacitor Distance from Lens Reference Plane to Surface Speed Acceleration Light Level onto IC Symbol TA VDD3 VDD5 CLK XRES CRESET A S ACC IRRINC 40 Min. 0 3.15 4.25 23.88 17.4 0.001 2.3 0 0 0 Typ. 3.3 5.0 24.00 18.432 0.22 2.4 Max. 40 3.45 5.5 24.12 18.7 40 10.0 2.5 16 39 0.2 2500 0 Units C V V MHz F mm in/sec cm/sec g mW/m^2 = 639 nm Notes
Set by ceramic resonator For generic PS/2 operation
Dimension A on HDNS-2100 data sheet
DC Electrical Specifications Electrical Characteristics over recommended operating conditions. Typical values at 25C, VDD3 = 3.3, VDD5 = 5.0, Clock = 24 MHz. Parameter Symbol Supply Current (Mouse Moving) IDD3 Supply Current (Mouse Moving) IDD5 Supply Current (Mouse Not Moving) IDD5 Input Low Voltage VIL Input High Voltage VIH Output Low Voltage (LED) VOL Output Low Voltage (XA, XB, YA, YB) VOL Output High Current (XA, XB, YA, YB) IOH Output High Current (LED) IOHBD Input Pullup (RB, MB, LB) I PU Output Low Voltage (PS/2) VOL Output Pullup Current (PS/2) IOH Reset Pullup Current IRESET Min. Typ. 12.1 6.1 2.5 Max. 20.1 12.4 0.8 2 0.3 100 1.5 100 300 5 300 3.1 300 0.41 625 10 0.5 0.5 600 6 600 0.5 1500 20 Units mA mA mA V V V V A mA A V A A Notes Pin 6 = 0.6 V Pin 6 = 0.6 V
IOL = 2 mA IOL = 4 mA VOH = 2.1 V VBE = 0.6 V VIN = 0.8 V IOL = 10 mA VOH = 2.0 V VNRESET = 2.0 V
7
I/O Specifications
PS/2 Command Set Implementation
The following commands are implemented. All other commands will cause an FE (resend) response from the ADNS-2001. A second invalid command will cause an FC (error) response from the ADNS-2001. Hex Command and Response Bytes FF FA AA 00 FE nn... F6 FA F5 FA F4 FA F3 FA nn FA Mnemonics for Command and Response Bytes FF ACK ID DT FE nn... F6 ACK F5 ACK F4 ACK F3 ACK nn ACK Valid Values and Default Value after Software or Hardware Reset
Mnemonic for Command RESET RESEND SET_DFS DISABLE ENABLE SET_SAMPLING
Description Soft reset ID = AA, DT = 0 Resend last byte (i.e., ACK) or packet Default setting Disable stream mode Enable stream mode Set sampling rate
(default mode) (0A 14 28 3C 50 64 C8) 10 20 40 60 80 100 120 reports/second
READ_DT ECHO NO_ECHO READ_DATA SET_STREAM SET_PROMPT STATUS SET_SCALE LIN_SCALE SET_RES DISABLE_TEST
F2 FA 00 EE FA EC FA EB FA nn nn nn EA FA F0 FA E9 FA nn nn nn E7 FA E6 FA E8 FA nn FA E8 FA AA FA
F2 ACK DT EE ACK EC ACK EB ACK nn nn nn EA ACK F0 ACK E9 ACK nn nn nn E7 ACK E6 ACK E8 ACK nn ACK E8 ACK AA RESEND
Responds with DT = 00 Echo all further commands until NO_ECHO or RESET Respond to following commands normally Request a data packet Respond with data packets at the sample rate Data only sent on READ_DATA Request status packet Pseudo log Linear Set resolution For test purposes only
See IBM PS/2 Mouse Technical Reference (default mode)
See IBM PS/2 Mouse Technical Reference (default mode) (00 01 02 03) 2 4 8 16 counts/mm) Default mode after hardware reset
8
PS/2 Mode Output Waveforms @ 24 MHz
Host Sending Data Timing Diagram
I/O INHIBIT 1ST CLK 2ND CLK 9TH CLK 10TH CLK 11TH CLK
CLK
(5) T1 T2 T3 DATA (1) START BIT BIT 0 (2) PARITY BIT (2) (3) STOP BIT (4)
Notes: 1. The mouse checks the DATA line. If the line is low, the system has data to transmit. The DATA line is set inactive when the start bit (always 0) is placed on the DATA line. 2. The mouse samples the DATA line for each bit while the CLK line is high. Data must be stable within 1 microsecond after the rising edge of the CLK line. 3. The mouse checks for a high stop bit after the 10th CLK. If the DATA line is low, the mouse continues to clock until the DATA line becomes high, then clocks the line-control bit, and at the next opportunity sends a Resend command to the system. 4. The mouse pulls the DATA line low, producing the line-control bit. 5. The host can pull the CLK line low, inhibiting the mouse.
Timing Parameter T1 T2 T3
Description Duration of CLK high Duration of CLK low Time from falling CLK transition, to date transition
Min. Time 22.5 sec 22.5 sec 0 sec
Max. Time 37.5 sec 37.5 sec 22.5 sec
Host Receiving Timing Diagram
CLK
1ST CLK T3 T1 T2 T4
2ND CLK
3RD CLK
10TH CLK
11TH CLK
(1, 2)
T5 BIT 0 BIT 1 BIT 2 PARITY BIT STOP BIT
DATA
START BIT
Notes: 1. The host can hold the clock signal low to inhibit the next transmission. 2. The host raises the clock line to allow the next transmission. 3. All times given below assume a 24 MHz resonator and are dependent upon its accuracy.
Timing Parameter T1 T2 T3 T4 T5
Description Time from DATA transition to falling edge of CLK Time from rising edge of CLK to DATA transition Duration of CLK low Duration of CLK high Time to mouse inhibit after clock 11 to ensure the mouse does not start another transmission
Min. Time 3.75 sec 3.75 sec 22.5 sec 22.5 sec 0 sec
Max. Time 18.75 sec 18.75 sec 37.5 sec 37.5 sec 37.5 sec
9
Quadrature Output Mode Waveform @ 24 MHz The 2 channel quadrature outputs are 5 V CMOS outputs. The Delta X count is used to generate the XA and XB quadrature signals. The Delta Y count is used to generate the YA and YB quadrature signals. Delta X, Y counts are in the range of +7 to -7 counts of motion and new Delta X, Y values are generated at a rate of 2000 Hz. The quadrature signals can change at a maximum rate of 16.7 kHz.
XB
60 s
60 s
XA
60 s
60 s
60 s
60 s
Example: Quadrature Output Waveform (+X motion).
AC Electrical Specifications Electrical Characteristics over recommended operating conditions. Typical values at 25C, VDD3 = 3.3, VDD5 = 5.0, A = 2.4 mm, CLK = 24.00 MHz. Parameter PS/2 Baud Rate PS/2 Data Transition Delay after PS/2_C Rising Edge PS/2 Motion Report Rates Motion Scale Factor Power Up Delay Symbol Fps2 T2 Min. 13.3 7.5 Typ. 16.7 15 133 400 100 Max. 20 18.8 Units Kbaud s reports/sec counts/inch ms Notes See PS/2 timing diagrams See PS/2 command settings CRESET = 0.22 F
10
Typical Performance Characteristics Typical Performance of ADNS-2001 assembled as shown in Figure 3 with HDNS-2100 Lens, HDNS-2200 LED Assembly Clip and HLMP-ED80.
450
AVERAGE ERROR (% OF TRAVEL) RESOLUTION (COUNTS/INCH)
10 9 8 7 6 5 4
WOOD (WALNUT) RECOMMENDED OPERATING REGION PAPER FILE FOLDER WHITE LAMINATED DESKTOP
400 350 300 250 200 150 100 50 0 2.0 2.2 2.4 2.6 2.8 3.0 3.2 RECOMMENDED DISTANCE FROM LENS FOOT REFERENCE PLANE TO SURFACE
3 2 1 0 2.0 2.2 2.4
BLACK CLOTH MOUSE PAD
2.6
2.8
3.0
3.2
DISTANCE FROM HDNS-2100 LENS FOOT REFERENCE PLANE TO SURFACE (mm)
DISTANCE FROM HDNS-2100 LENS FOOT REFERENCE PLANE TO SURFACE (mm)
Figure 5. Typical resolution vs. assembly height.
Figure 6. Typical error vs. assembly.
1.0
TRAVEL IN y DIRECTION (mm)
70 60 57 50 40 30 20 10 0 0 10 20 30 40 50 60 70
TRUE REPORTED
0.9
RELATIVE RESPONSIVITY
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 700 800 900 1000
WAVELENGTH (nm)
TRAVEL IN x DIRECTION (mm)
Figure 7. Typical responsivity vs. wavelength. Note: Due to the higher flame speed, any shorter wavelength LED other than HLMP-ED80 is not recommended.
Figure 8. Typical reported path vs. true path.
11
Ordering Information Specify Part Number as follows: ADNS-2001 = Sensor IC in a 16-pin optical plastic package, 20 per tube, 1000 pieces in a box. ADNB-2012 = ADNS-2001 Sensor and HDNS-2100 Round Lens Bundle Kit, 1000 pieces incremental (e.g., ADNB-2012: 1000 pieces = 1000 pieces of ADNS-2001 and 1000 pieces of HDNS-2100 in a box). ADNB-2013 = ADNS-2001 Sensor and HDNS-2100 #001 Trimmed Lens Bundle Kit, 1000 pieces incremental (e.g., ADNB2013: 1000 pieces = 1000 pieces of ADNS-2001 and 1000 pieces of HDNS-2100 #001 in a box). HDNS-2100 = Round Optical Mouse Lens HDNS-2101-001 = Trimmed Optical Mouse Lens HDNS-2200 = LED Assembly Clip (Black) HDNS-2200-001 = LED Clip (Clear) HLMP-ED80 = LED
www.agilent.com/semiconductors
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152 (Domestic/International), or 0120-61-1280 (Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright (c) 2004 Agilent Technologies, Inc. May 10, 2004 5988-2793EN
This datasheet has been download from: www..com Datasheets for electronics components.


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